Verilog HDL OOP Simulation/IDE

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Simulate Verilog HDL without compiling to RTL. Instead, instantiate objects that run the HDL directly. A debugger that can then set breakpoints. single step, set watches, etc. then becomes feasable. C# makes it easy to parse HDL and simulate. Prototype code and two simpl...

http://veriloghdlexe.codeplex.com/

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