Related Projects

hdl - HDL libraries and projects

  •    Verilog

Analog Devices Inc. HDL libraries and projects. This repository supports reference designs for different Analog Devices boards based on Intel and Xilinx FPGA development boards or standalone.

gr-ieee802-11 - IEEE 802.11 a/g/p Transceiver

  •    C++

This an IEEE 802.11 a/g/p transceiver for GNU Radio that is fitted for operation with Ettus N210s and B210s. Interoperability was tested with many off-the-shelf WiFi cards and IEEE 802.11p prototypes. The code can also be used in simulations. Like GNU Radio, this module uses master and next branches for development, which are supposed to be used with the corresponding GNU Radio branches. I recommend staying up-to-date by using the next branch.

trunk-recorder - Records calls from a Trunked Radio System (P25 & SmartNet)

  •    C++

Trunk Recorder is able to record the calls on trunked and conventional radio systems. It uses 1 or more Software Defined Radios (SDRs) to do this. The SDRs capture large swatches of RF and then use software to process what was received. GNURadio is used to do this processing because it provides lots of convenient RF blocks that can be pieced together to allow for complex RF processing. The libraries from the amazing OP25 project are used for a lot of the P25 functionality. Multiple radio systems can be recorded at the same time. Trunk Recorder has been tested on Ubuntu (14.04, 16.04, 16.10, 17.04, 17.10 & 18.04), Arch Linux (2017.03.01), Debian 9.x and macOS (10.10, 10.11, 10.12, 10.13, 10.14). It has been successfully used with several SDRs including the Ettus USRP B200, B210, B205, a bank of 3 RTL-SDR dongles, and the HackRF Jawbreaker.

rtl_433 - Program to decode traffic from Devices that are broadcasting on 433

  •    C

Read the Test Data section at the bottom. This software is mostly usable for developers right now.

Rapid HDL


Rapid Hardware Definition Language (Rapid HDL) is an object oriented C# software library in to script/generate/build synthesizable Verilog for FPGA hardware and software co-design in Visual Studio. It also integrates and automates Xilinx or Mentor Graphics build tools.

vunit - VUnit is a unit testing framework for VHDL/SystemVerilog

  •    VHDL

VUnit is an open source unit testing framework for VHDL/SystemVerilog released under the terms of Mozilla Public License, v. 2.0. It features the functionality needed to realize continuous and automated testing of your HDL code. VUnit doesn't replace but rather complements traditional testing methodologies by supporting a "test early and often" approach through automation. Contributing in the form of code, feedback, ideas or bug reports are welcome. Read our contribution guide to get started.

fusesoc - FuseSoC is a package manager and a set of build tools for FPGA/ASIC development

  •    Python

FuseSoC is an award-winning package manager and a set of build tools for HDL (Hardware Description Language) code. Its main purpose is to increase reuse of IP (Intellectual Property) cores and be an aid for creating, building and simulating SoC solutions.

PowerSDR Transceiver for SoftRock40

  •    C

PowerSDR-sr40 is a branch of PowerSDR ( and adds features for use with a SoftRock40 Radio. It is a near Zero-IF Quadrature Software Defined Radio (SDR). Features includes; TX capabilities, IQ sample correction, Dual Soundcard support.


  •    C

OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.

ariane - Ariane is a 6-stage RISC-V CPU

  •    SystemVerilog

Ariane is a 6-stage, single issue, in-order CPU which implements the 64-bit RISC-V instruction set. It fully implements I, M and C extensions as specified in Volume I: User-Level ISA V 2.1 as well as the draft privilege extension 1.10. It implements three privilege levels M, S, U to fully support a Unix-like operating system. Furthermore it is compliant to the draft external debug spec 0.13. It has configurable size, separate TLBs, a hardware PTW and branch-prediction (branch target buffer and branch history table). The primary design goal was on reducing critical path length.

gnss-sdr - GNSS-SDR, an open source GNSS software defined receiver

  •    C++

Visit for more information about this open source GNSS software defined receiver. If you have questions about GNSS-SDR, please subscribe to the gnss-sdr-developers mailing list and post your questions there.

Verilog HDL OOP Simulation/IDE


Simulate Verilog HDL without compiling to RTL. Instead, instantiate objects that run the HDL directly. A debugger that can then set breakpoints. single step, set watches, etc. then becomes feasable. C# makes it easy to parse HDL and simulate. Prototype code and two simpl...

autonomous-rc-car - Autonomous RC car using Raspberry Pi and ANN

  •    Python

This project aims to build an autonomous rc car using supervised learning of a neural network with a single hidden layer. We have not used any Machine Learning libraries since we wanted to implement the neural network from scratch to understand the concepts better. We have modified a remote controlled car to remove the dependency on the RF remote controller. A Raspberry Pi controls the DC motors via an L293D Motor Driver IC. You can find a post explaining this project in detail here. Here's a video of the car in action. We will be referring the DC motor controlling the left/right direction as the front motor and the motor controlling the forward/reverse direction as the back motor. Connect the BACK_MOTOR_DATA_ONE and BACK_MOTOR_DATA_TWO GPIO pins(GPIO17 and GPIO27) of the Raspberry Pi to the Input pins for Motor 1(Input 1, Input 2) and the BACK_MOTOR_ENABLE_PIN GPIO pin(GPIO22) to the Enable pin for Motor 1(Enable 1,2) in the L293D Motor Driver IC. Connect the Output pins for Motor 1(Output 1, Output 2) of the IC to the back motor.

fw1 - FW/1 - Framework One - is a lightweight, convention over configuration, MVC application framework for ColdFusion / CFML

  •    ColdFusion

This FW/1 directory is a complete web application and expects to live in its own webroot if you plan to run the applications within it. To use FW/1 in a separate webroot you can either copy the framework directory to that webroot or add a mapping for /framework to the framework folder inside this FW/1 directory. Note that since your Application.cfc needs to extend, you have to add the mapping in your admin - you can't just use a per-application mapping. Chat: The CFML team Slack has a dedicated #fw1 channel.

airplanejs - 📡 ✈️ App that picks up ADS-B radio signals from airplanes and plots them in real time on a map in your browser

  •    Javascript

Disclaimer: I'm trying out the Amazon Affiliate Program to support my free open source work. So if you decide to buy an RTL-SDR dongle using one of the links above I'll be grateful (the search link should work as well).For more information about buying RTL-SDR dongles, check out the blog buyers guide.

rtlamr - An rtl-sdr receiver for Itron ERT compatible smart meters operating in the 900MHz ISM band.

  •    Go

Utilities often use "smart meters" to optimize their residential meter reading infrastructure. Smart meters transmit consumption information in the various ISM bands allowing utilities to simply send readers driving through neighborhoods to collect commodity consumption information. One protocol in particular: Encoder Receiver Transmitter by Itron is fairly straight forward to decode and operates in the 900MHz ISM band, well within the tunable range of inexpensive rtl-sdr dongles. This project is a software defined radio receiver for these messages. We make use of an inexpensive rtl-sdr dongle to allow users to non-invasively record and analyze the commodity consumption of their household.

CheckPoint 2 Juniper FW policies


CheckPoint FW rules conversion into Juniper FW policies

paddle-mobile - This research aims at simply deploying deeplearning on mobile and embedded devices, with low complexity and high speed

  •    C++

This research aims at simply deploying deeplearning on mobile and embedded devices, with low complexity and high speed. old name mobile deep learning.

shinysdr - Software-defined radio receiver application built on GNU Radio with a web-based UI and plugins

  •    Python

ShinySDR is the software component of a software-defined radio receiver. When combined with suitable hardware devices such as the RTL-SDR, HackRF, or USRP, it can be used to listen to or display data from a variety of radio transmissions. ShinySDR is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version.

rtl-entropy - An entropy generator using SDR peripherals, including rtl-sdr and BladeRF

  •    C

rtl-entropy is software using rtl-sdr to turn your DVB-T dongle into a high quality entropy source. It samples atmospheric noise, does Von-Neumann debiasing, runs it through the FIPS 140-2 tests, then optionally (-e) does Kaminsky debiasing if it passes the FIPS tests, then writes to the output. It can be run as a Daemon which by default writes to a FIFO, which can be read by rngd to add entropy to the system pool. If you're serious about the cryptographic security of your entropy source, you should probably short, or put a 75 Ohm load on the antenna port, and put the whole assembly in a shielded box. Then you're getting entropy from the thermal noise of the amplifiers which is much harder to interfere with than atmospheric radio.