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Homework and project solutions for the distributed computing course CS 141b at the California Institute of Technology. If you are enrolled in CS 141b or a similar course, please consult with the instructor before looking at the code.
Software developers use testing to raise confidence in the correctness of a software system. Automated reduction and prioritization techniques attempt to decrease the time required to detect faults during test suite execution. This package uses the Harrold Gupta Soffa, delayed greedy, traditional greedy, and 2-optimal greedy algorithms for both test suite reduction and prioritization. Even though reducing and reordering a test suite is primarily done to ensure that testing is cost-effective, the
QuickDiagram is a system developed by a team led by Dr. Liu Wenyin (www.cs.cityu.edu.hk/~liuwy) for quick input and understanding of circuit diagrams by sketching. With a user sketching a (complete or partial) component/symbol or wire (connecting two symbols) of the diagram, the system can recognize and beautify it immediately. After the entire diagram is complete, certain understandings can be obtained. The system has a symbol database with more than 600 circuit devices/symbols. Three steps of
Updates2010-11-11 New s26 book. This one has 80001 draws proven to 29 empty! Finding new draws is now beginning to get harder. But there's still a great deal of nodes at 30 empty with score -2. These could turn out to be draws too. Anybody with a large number of cpu's who want to take over should contact me (dlidstrom at gmail dot com). 2010-11-04 Uploaded new binary. Improvements for analysing books with smaller depth. Also, now prioritizes lines with shorter depth when total scores are equal.